600 nm process


The 600 nm process refers to the level of CMOS semiconductor fabrication process technology that was commercialized around the 1990–1995 timeframe, by leading semiconductor companies like Mitsubishi Electric, Toshiba, NEC, Intel and IBM.

History

A MOSFET device with a 500nm NMOS channel length was fabricated by a research team led by Robert H. Dennard, Hwa-Nien Yu and F.H. Gaensslen at the IBM T.J. Watson Research Center in 1974. A CMOS device with a 500nm NMOS channel length and 900nm PMOS channel length was fabricated by Tsuneo Mano, J. Yamada, Junichi Inoue and S. Nakajima at Nippon Telegraph and Telephone in 1983.
A CMOS device with 500nm channel length was fabricated by an IBM T.J. Watson Research Center team led by Hussein I. Hanafi and Robert H. Dennard in 1987. Commercial 600nm CMOS memory chips were manufactured by Mitsubishi Electric, Toshiba and NEC in 1989.

Products featuring 0.6 μm manufacturing process