List of MIPS architecture processors
This is a list of processors that penetrate the MIPS instruction set architecture, sorted by year, process size, frequency, die area, and so on. These processors are designed by Imagination Technologies, MIPS Technologies, and others. It displays an overview of the MIPS processors with performance and functionality versus capabilities for the more recent MIPS Aptiv families.
MIPS Computer Systems/MIPS Technologies
Imagination Technologies
was acquired 17 December 2012, by Imagination Technologies. Since then, the following processors have been introduced by Imagination Technologies.The Warrior P-Class CPU was announced on.
The CPU IP cores comprising the MIPS Series5 ‘Warrior’ family are based on MIPS32 release 5 and MIPS64 release 6, and will come in three classes of performance and features:
- 'Warrior M-class': entry-level MIPS cores for embedded and microcontroller applications, a progression from the popular microAptiv family
- 'Warrior I-class': mid-range, feature-rich MIPS CPUs following on from the highly efficient interAptiv family. The I6400, with its 64-bit core, was launched September 2014.
- 'Warrior P-class': high-performance MIPS processors building on the proAptiv family
| MIPS version | level | Processor | Year | Process | Frequency | Transistors | Die area | Pin count | Power | Voltage | D. cache | I. cache | MMU | L2 cache | L3 cache | Features |
| MIPS32 Release 5 | Warrior-P | P5600 | 2013 | ? | 1.0 to 2.0 | ? | ? | ? | ? | ? | 32/64 | 32/64 | TLb | Up to 8 MB external | none | VZ, MSA |
| MIPS32 Release 5 | Warrior-M | M5100 | 2014 | 65/28 | 0.1 to 0.497 | ? | 0.04 to 0.77 | ? | none | none | FMT | none | none | VZ | ||
| MIPS32 Release 5 | Warrior-M | M5150 | 2014 | 65/28 | 0.372/0.576 | ? | 0.89/0.26 | ? | up to 64 | up to 64 | TLB | none | none | VZ | ||
| MIPS64 Release 6 | Warrior-P | P6600 | 2015 | 28 | Up to 2.0 | ? | ? | ? | ? | ? | 32/64 | 32/64 | TLB | 0.5 - 8 MB external | none | SMT, VZ |
| MIPS64 Release 6 | Warrior-I | I6400 | 2014 | 28 | 1.0 | ? | 1/core | ? | ? | ? | 32/64 | 32/64 | TLB | 0.5 - 8 MB external | none | SMT, VZ |
| MIPS64 Release 6 | Warrior-M | M6200 | 2015 | 65/40/28 | up to 0.750 | ? | 0.19 | ? | none | none | FMT | none | none | |||
| MIPS64 Release 6 | Warrior-M | M6250 | 2015 | 65/40/28 | up to 0.750 | ? | 0.23 | ? | up to 64 | up to 64 | TLB | none | none | XPA | ||
| MIPS version | level | Processor | Year | Process | Frequency | Transistors | Die area | Pin count | Power | Voltage | D. cache | I. cache | MMU | L2 cache | L3 cache | Features |
Other designers
A number of companies licensed the MIPS architecture and developed their own processors.| MIPS version | Licensee | Processor | Features | Year | Process | Frequency | Transistors | Die size | Pin count | Power | Voltage | D. cache | I. cache | MMU | L2 cache | L3 cache |
| MIPS I | Lexra | LX4080, LX4180, LX4280, LX5280, LX8000 | ||||||||||||||
| MIPS II | НИИСИ РАН | KOMDIV-32 | ||||||||||||||
| MIPS III | Sony Computer Entertainment + Toshiba | Emotion Engine | ||||||||||||||
| MIPS III | НИИСИ РАН | KOMDIV-64 | ||||||||||||||
| MIPS32 | Alchemy Semiconductor | Au1 | ||||||||||||||
| MIPS32 | Broadcom | BMIPS3000 | ||||||||||||||
| MIPS32 | Broadcom | BMIPS4000 | ||||||||||||||
| MIPS32 | Broadcom | BMIPS5000 | 1300 | |||||||||||||
| MIPS32 | Broadcom | BCM53001 | 65 | 400 | 32 | 32 | ||||||||||
| MIPS32 | Broadcom | BCM1255 | ||||||||||||||
| MIPS32 | Ingenic Semiconductor | XBurst 1 | single issue, 8-stage pipeline | 2005 | 180, 130, 64, 40 | 240 | 0.15 | 1.8 | 16 | 16 | yes | none | none | |||
| MIPS64 | SiByte | SB1 | ||||||||||||||
| MIPS64 | Broadcom | BCM1125H | 400-800 | 4w @ 400 MHz | 32 | 32 | yes | 256 KB | ||||||||
| MIPS64 | Broadcom | BCM1255 | Dual-core, DDR2, 4× Gigabit LAN | 800-1200 | 13 W @ 1 GHz | 32 | 32 | yes | 512 KB | |||||||
| MIPS64 | Cavium | Octeon: CN30xx, CN31xx, CN36xx, CN38xx | 2006 | |||||||||||||
| MIPS64 | Cavium | Octeon Plus: CN5xxx | 2007 | |||||||||||||
| MIPS64 | Cavium | Octeon II: CN6xxx | 2009 | |||||||||||||
| MIPS64 | Cavium | Octeon III: CN7xxx | 2012 | |||||||||||||
| MIPS64 | Ingenic Semiconductor | XBurst 2 | dual-issue/dual-threaded | 2013 | 40 | 240 | 0.15 | 1.8 | 16 | 16 | yes | none | none | |||
| MIPS64 | NEC | VR4305 | ||||||||||||||
| MIPS64 | NEC | VR4310 | ||||||||||||||
| MIPS64 | NXP Semiconductors | ?? | ||||||||||||||
| MIPS64 | NXP Semiconductors | ?? | ||||||||||||||
| MIPS64 | CAS: ICT | none yet | ||||||||||||||
| MIPS64 | CAS: ICT | ?? | ||||||||||||||
| MIPS version | Licensee | Processor | Features | Year | Process | Frequency | Transistors | Die size | Pin count | Power | Voltage | D. cache | I. cache | MMU | L2 cache | L3 cache |
Other
- PhysX P1 - A multi-core physics processing unit that contains MIPS cores